The present invention relates to semiconductor memory technology, and more particularly, to a semiconductor memory device for reading data from or writing data to a memory cell at high speed and a method of driving the same.
During execution of a read command or a write command on a memory cell in a semiconductor memory device, e.g., a dynamic random access memory (DRAM), logic values of a pair of bit lines connected to a pair of sense amplifiers vary. Execution of a read or write command may take longer when the logic values of the pair of bit lines vary compared to when the logic values of the bit lines do not need to vary. This can be caused because the sense amplifiers still operate during the command execution and tend to maintain existing logic values of the pair of bit lines.
Such operation of the sense amplifiers may hinder the performance (e.g., an operating speed) of DRAM from increasing.
To overcome this problem, methods of increasing the width of or decreasing the length of a transistor driving input/output data have been introduced. However, increasing the width of a transistor driving input/output data may increase the area of a memory core and may cause a read margin to be reduced due to a bump characteristic during a read operation, thereby reducing a yield.